Switched-capacitor filters, kT/C noise, chopping, and correlated double sampling.

Lecture 1 and 2 along the lines of Schmid, H. & Huber, A. Analog Integr Circ Sig Process (2018) 96: 495.

Lecture 3 uses J. Liu, X. Tang, W. Zhao, L. Shen and N. Sun, "A 13-bit 0.005-mm2 40-MS/s SAR ADC With kT/C Noise Cancellation," in IEEE Journal of Solid-State Circuits, vol. 55, no. 12, pp. 3260-3270, Dec. 2020

Exercises

Exercise 08a (for Lecture 1)
Exercise 08b (for Lecture 2)
- Paper 1: Enz 1996, Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization
- Paper 2: Ki 1990, Offset-compensated switched-capacitor integrators
No exercises for Lecture 3. We discuss a paper:
- Liu 2020, A 13-bit 0.005-mm^2 40-MS/s SAR ADC With kT/C Noise Cancellation

Additional material

The derivation of the kT/C Formula is on p.~254 of the following paper:

A tutorial to switched-capacitor noise analysis by hand (Schmid/Eichelberger/Huber)

Suppressing flicker noise is described here:

SC Filters (last edited 2025-08-20 13:21:13 by haschmid)